Regviz

Espressif Systems /ESP32-S3 /SENSITIVE /CORE_0_PIF_PMS_CONSTRAIN_8

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as CORE_0_PIF_PMS_CONSTRAIN_8

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/Espressif Systems/ESP32-S3/SENSITIVE/CORE_0_PIF_PMS_CONSTRAIN_8#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_USB_DEVICE 0CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_USB_WRAP 0CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_CRYPTO_PERI 0CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_CRYPTO_DMA 0CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_APB_ADC 0CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_LCD_CAM 0CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_BT_PWR 0CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_USB 0CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_SYSTEM 0CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_SENSITIVE 0CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_INTERRUPT 0CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_DMA_COPY 0CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_CACHE_CONFIG 0CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_AD 0CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_DIO 0CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_WORLD_CONTROLLER

Description

Core0 access peripherals permission configuration register 8.

Fields

CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_USB_DEVICE

Core0 access usb_device permission in world1.
CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_USB_WRAP

Core0 access usb_wrap permission in world1.
CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_CRYPTO_PERI

Core0 access crypto_peri permission in world1.
CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_CRYPTO_DMA

Core0 access crypto_dma permission in world1.
CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_APB_ADC

Core0 access apb_adc permission in world1.
CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_LCD_CAM

Core0 access lcd_cam permission in world1.
CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_BT_PWR

Core0 access bt_pwr permission in world1.
CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_USB

Core0 access usb permission in world1.
CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_SYSTEM

Core0 access system permission in world1.
CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_SENSITIVE

Core0 access sensitive permission in world1.
CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_INTERRUPT

Core0 access interrupt permission in world1.
CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_DMA_COPY

Core0 access dma_copy permission in world1.
CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_CACHE_CONFIG

Core0 access cache_config permission in world1.
CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_AD

Core0 access ad permission in world1.
CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_DIO

Core0 access dio permission in world1.
CORE_0_PIF_PMS_CONSTRAIN_WORLD_1_WORLD_CONTROLLER

Core0 access world_controller permission in world1.

Links

()

Register License

Copyright 2024 Espressif Systems (Shanghai) PTE LTD

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

 ()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data